Programmable logic device with highly routable int

专利名称：Programmable logic device with highly

routable interconnect

发明人：Craig S. Lytle,Kerry S. Veenstra申请号：US09687215申请日：20010201公开号：US06492834B1公开日：20021210

专利附图：

摘要：A programmable logic device architecture with a highly routable programmableinterconnect structure. The arrangement of the logic array blocks (LABs), programmableinterconnect structure, and other logical elements forms a Clos network. After specific

constraints have been met, the architecture is guaranteed to route. The architecture isprovably routable when there is no fan-out in the middle stage. A LAB () comprises aninput multiplexer region (), logic elements (), input-output pins (), and output multiplexerregion ().

申请人：ALTERA CORPORATION

代理机构：Townsend and Townsend and Crew LLP

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