LTC6403-1200MHz, Low Noise, Low Power Fully Differential Input/Output Amplifi er/DriverFEATURES
Very Low Distortion: (2VP-P, 3MHz): –95dBc■ Fully Differential Input and Output■ Low Noise: 2.8nV/√Hz Input-Referred■ 200MHz Gain-Bandwidth Product■ Slew Rate: 200V/μs■ Adjustable Output Common Mode Voltage■ Rail-to-Rail Output Swing■ Input Range Extends to Ground■ Large Output Current: 60mA (Typ)■ DC Voltage Offset <1.5mV (Max)■ 10.8mA Supply Current■ 2.7V to 5.25V Supply Voltage Range■ Low Power Shutdown■ Tiny 3mm × 3mm × 0.75mm 16-Pin QFN Package■DESCRIPTION
The LTC®6403-1 is a precision, very low noise, low dis-tortion, fully differential input/output amplifi er optimized for 3V to 5V, single supply operation. The LTC6403-1 is unity gain stable. The LTC6403-1 closed-loop bandwidth extends from DC to 200MHz. In addition to the normal unfi ltered outputs (+OUT and –OUT), the LTC6403-1 has a built-in 44.2MHz differential single-pole low pass fi lter and an additional pair of fi ltered outputs (+OUTF, and –OUTF). An input referred voltage noise of 2.8nV/√Hz enables the LTC6403-1 to drive state-of-the-art 14- to 18-bit ADCs while operating on the same supply voltage, saving system cost and power. The LTC6403-1 maintains its performance for supplies as low as 2.7V. It draws only 10.8mA, and has a hardware shutdown feature which reduces current consumption to 170μA.The LTC6403-1 is available in a compact 3mm × 3mm 16-pin leadless QFN package and operates over a –40°C to 85°C temperature range., LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.APPLICATIONS
■ ■ ■ ■Differential Input A/D Converter DriverSingle-Ended to Differential Conversion/Amplifi cationCommon Mode Level TranslationLow Voltage, Low Noise, Signal ProcessingTYPICAL APPLICATION
Single-Ended Input to Differential Output with Common Mode Level Shifting–30
2VP-P0VVSDISTORTION (dBc)50Ω392Ω402Ω3V0.1μF1VP-P
VOCM0.01μFHarmonic Distortion vs FrequencySINGLE-ENDED INPUT–40VS = 3VVOCM = VICM = 1.5V–50RF = RI = 402ΩRLOAD = 800Ω–60VOUTDIFF = 2VP-P–70–80–90
THIRDSECOND54.9ΩSIGNALGENERATOR+LTC6403-11.5V
–100
1.5V
1VP-P
64031 TA01
––110–120
1
10
FREQUENCY (MHz)
100
64031 TA01b
422Ω402Ω64031f1
元器件交易网www.cecb2b.com
LTC6403-1ABSOLUTE MAXIMUM RATINGS
(Note 1)PIN CONFIGURATION
TOP VIEW
–OUTF12V–
17
11V+10V+9
5NC6–IN7+OUT8+OUTFV–
–OUT+INNCSHDNV+V–VOCM
1234
Total Supply Voltage (V+ to V–) ................................5.5VInput Voltage ...................V+ to V–(+IN, –IN, VOCM, SHDN) (Note 2) Input Current .....................±10mA(+IN, –IN, VOCM, SHDN) (Note 2) Output Short-Circuit Duration (Note 3) ............Indefi niteOperating Temperature Range (Note 4) ...............................................–40°C to 85°CSpecifi ed Temperature Range (Note 5) ...............................................–40°C to 85°CJunction Temperature ...........................................150°CStorage Temperature Range ...................–65°C to 150°C16151413
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFNTJMAX = 150°C, θJA = 160°C/W, θJC = 4.2°C/WEXPOSED PAD (PIN 17) IS V–, MUST BE SOLDERED TO PCBORDER INFORMATION
LEAD FREE FINISHLTC6403CUD-1#PBFLTC6403IUD-1#PBFTAPE AND REELPART MARKING*PACKAGE DESCRIPTION16-Lead (3mm × 3mm) Plastic QFN16-Lead (3mm × 3mm) Plastic QFNSPECIFIED TEMPERATURE RANGE0°C to 70°C–40°C to 85°CLTC6403CUD-1#TRPBFLDBMLTC6403IUD-1#TRPBFLDBMConsult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.Consult LTC Marketing for information on non-standard lead based fi nish parts.For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/ The ● denotes the specifi cations which apply +–over the full operating temperature range, otherwise specifi cations are at TA = 25°C, V = 3V, V = 0V, VCM = VOCM = VICM = Mid-Supply, VSHDN = OPEN, RI = 402Ω, RF = 402Ω, RL = OPEN, RBAL = 100k (See Figure 1) unless otherwise noted. VS is defi ned as+–(V – V). VOUTCM is defi ned as (V+OUT + V–OUT)/2. VICM is defi ned as (V+IN + V–IN)/2. VOUTDIFF is defi ned as (V+OUT – V–OUT). VINDIFF is defi ned as (VINP – VINM).SYMBOLVOSDIFFPARAMETERDifferential Offset Voltage (Input Referred)CONDITIONSVS = 2.7VVS = 3VVS = 5VVS = 2.7VVS = 3VVS = 5V●●●LTC6403-1 DC ELECTRICAL CHARACTERISTICS
MINTYP±0.4±0.4±0.4111MAX±1.5±1.5±2UNITSmVmVmVμV/°CμV/°CμV/°CΔVOSDIFF/ΔTDifferential Offset Voltage Drift (Input Referred)64031f2
元器件交易网www.cecb2b.com
LTC6403-1LTC6403-1 DC ELECTRICAL CHARACTERISTICS The ● denotes the specifi cations which apply +–over the full operating temperature range, otherwise specifi cations are at TA = 25°C, V = 3V, V = 0V, VCM = VOCM = VICM = Mid-Supply, VSHDN = OPEN, RI = 402Ω, RF = 402Ω, RL = OPEN, RBAL = 100k (See Figure 1) unless otherwise noted. VS is defi ned as+–(V – V). VOUTCM is defi ned as (V+OUT + V–OUT)/2. VICM is defi ned as (V+IN + V–IN)/2. VOUTDIFF is defi ned as (V+OUT – V–OUT). VINDIFF is defi ned as (VINP – VINM).PARAMETERInput Bias Current (Note 6)CONDITIONSVS = 2.7VVS = 3VVS = 5VVS = 2.7VVS = 3VVS = 5VCommon ModeDifferential ModeDifferential Modef = 1MHzf = 1MHzf = 1MHz, VOCM Shorted to Ground,V+ = 1.5V, V– = –1.5VVS = 3VVS = 5VVS = 3V, ΔVICM = 0.75VVS = 5V, ΔVICM = 1.25VVS = 5V, ΔVOCM = 2VVS = 2.7V to 5.25VVS = 2.7V to 5.25VVS = 5V, ΔVOCM = 2VVS = 5V, ΔVOCM = 2VΔVOUTDIFF = 2VSingle-Ended InputDifferential InputVS = 2.7VVS = 3VVS = 5VVS = 2.7VVS = 3VVS = 5VVS = 3VVS = 5VVS = 3V, VOCM = OpenVS = 3V, IL = 0VS = 3V, IL = 5mAVS = 3V, IL = 20mAVS = 5V, IL = 0VS = 5V, IL = 5mAVS = 5V, IL = 20mA●●●●●●SYMBOLIBMIN–25–25–25TYP–7.5–7.5–7.5±0.2±0.2±0.21.71412.81.817MAX000±5±5±5UNITSμAμAμAμAμAμAMΩkΩpFnV/√HzpA/√HznV/√HzIOSInput Offset Current (Note 6)RINCINeninenVOCMVICMR CMRRICMRRIOPSRRPSRRCMGCMΔGCMBALInput ResistanceInput CapacitanceDifferential Input Referred Noise Voltage DensityInput Noise Current DensityInput Referred Common Mode Output Noise Voltage DensityInput Signal Common Mode Range (Note 7)Input Common Mode Rejection Ratio(Input Referred) ΔVICM/ΔVOSDIFF (Note 8)Output Common Mode Rejection Ratio (Input Referred) ΔVOCM/ΔVOSDIFF (Note 8)Differential Power Supply Rejection (ΔVS/ΔVOSDIFF) (Note 9)Output Common Mode Power Supply Rejection (ΔVS/ΔVOSCM) (Note 9)Common Mode Gain (ΔVOUTCM/ΔVOCM)Common Mode Gain Error (100 • (GCM – 1))Output Balance (ΔVOUTCM/ΔVOUTDIFF)Common Mode Offset Voltage (VOUTCM – VOCM)Common Mode Offset Voltage Drift●●●●●●●●●●●●●●0050505060451.63.672729097631VVdBdBdBdBdBV/V–0.4–0.1–63–66±10±10±102020200.3–45–45±25±25±25%dBdBmVmVmVμV/°CμV/°CμV/°CVVkΩVmVmVmVmVmVmVVOSCMΔVOSCM/ΔTVOUTCMRRINVOCMVOCMVOUTOutput Signal Common Mode Range (Voltage Range for the VOCM Pin) (Note 7)Input Resistance, VOCM PinVoltage at the VOCM Pin (Self-Biased)Output Voltage, High, Either Output Pin (Note 10)●●●●●●●●●●1.11.1151.45231.519019034017019538024321.5530030049030034055064031f3
元器件交易网www.cecb2b.com
LTC6403-1LTC6403-1 DC ELECTRICAL CHARACTERISTICS The ● denotes the specifi cations which apply +–over the full operating temperature range, otherwise specifi cations are at TA = 25°C, V = 3V, V = 0V, VCM = VOCM = VICM = Mid-Supply, VSHDN = OPEN, RI = 402Ω, RF = 402Ω, RL = OPEN, RBAL = 100k (See Figure 1) unless otherwise noted. VS is defi ned as+–(V – V). VOUTCM is defi ned as (V+OUT + V–OUT)/2. VICM is defi ned as (V+IN + V–IN)/2. VOUTDIFF is defi ned as (V+OUT – V–OUT). VINDIFF is defi ned as (VINP – VINM).PARAMETEROutput Voltage, Low, Either Output Pin (Note 10)CONDITIONSVS = 3V, IL = 0VS = 3V, IL = –5mAVS = 3V, IL = –20mAVS = 5V, IL = 0VS = 5V, IL = –5mAVS = 5V, IL = –20mAVS = 2.7VVS = 3VVS = 5VVS = 3V●●●●●●●●●●SYMBOLVOUTMINTYP150165210165175225±58±60±7490MAX220245300265275350UNITSmVmVmVmVmVmVmAmAmAdBVmAmAmAmAmAmAVVkΩμsnsISCAVOLVSISOutput Short-Circuit Current, Either Output Pin (Note 11)Large-Signal Voltage GainSupply Voltage RangeSupply Current±30±30±352.75.2510.710.8110.160.170.2611.811.812.10.50.51V+ – 2.1VS = 2.7VVS = 3VVS = 5VVS = 2.7VVS = 3VVS = 5VVS = 2.7V to 5VVS = 2.7V to 5VVS = 5V, VSHDN = 2.9V to 0VVS = 3V, VSHDN = 0.5V to 3VVS = 3V, VSHDN = 3V to 0.5V●●●●●●●●ISHDNSupply Current in ShutdownVILVIHRSHDNtONtOFFSHDN Input Logic LowSHDN Input Logic HighSHDN Pull-Up ResistorTurn-On TimeTurn-Off TimeV+ – 0.64066435090LTC6403-1 AC ELECTRICAL CHARACTERISTICS SYMBOLSRGBWf3dBPARAMETERSlew RateGain-Bandwidth Product–3dB Frequency (See Figure 2)3MHz DistortionHD2HD33MHz DistortionHD2HD3CONDITIONSVS = 3VVS = 5VVS = 3VVS = 5VVS = 3VVS = 5VVS = 3V, VOUTDIFF = 2VP-PSingle-Ended Input 2nd Harmonic 3rd HarmonicVS = 3V, VOUTDIFF = 2VP-PDifferential Input 2nd Harmonic 3rd HarmonicThe ● denotes the specifi cations which apply +–over the full operating temperature range, otherwise specifi cations are at TA = 25°C, V = 3V, V = 0V, VCM = VOCM = VICM = Mid-Supply, VS ned (V+ – V–). VOUTCM is defi ned as HDN = OPEN, RI = 402Ω, RF = 402Ω, RT = 25.5Ω, unless otherwise noted (See Figure 2). VS is defi(V+OUT + V–OUT)/2. VICM is defi ned as (V+IN + V–IN)/2. VOUTDIFF is defi ned as (V+OUT – V–OUT). VINDIFF is defi ned as (VINP – VINM).MINTYP200200200200200200MAXUNITSV/μSV/μSMHzMHzMHzMHz●●100100–97–95dBcdBc–106–94dBcdBc64031f4
元器件交易网www.cecb2b.com
LTC6403-1LTC6403-1 AC ELECTRICAL CHARACTERISTICS SYMBOLIMDOIP3tSNFPARAMETERThird-Order IMD at 10MHzf1 = 9.5MHz, f2 = 10.5MHzEquivalent OIP3 at 3MHz (Note 12)Settling Time2V Step at OutputNoise Figure, f = 3MHzCONDITIONSVS = 3V, VOUTDIFF = 2VP-P EnvelopeVS = 3VVS = 3V, Single-Ended Input1% Settling0.1% SettlingRSOURCE = 804Ω, RI = 402Ω,RF = 402Ω, VS = 3VRSOURCE = 200Ω, RI = 100Ω,RF = 402Ω, VS = 3VThe ● denotes the specifi cations which apply +–over the full operating temperature range, otherwise specifi cations are at TA = 25°C, V = 3V, V = 0V, VCM = VOCM = VICM = Mid-Supply, VS ned (V+ – V–). VOUTCM is defi ned as HDN = OPEN, RI = 402Ω, RF = 402Ω, RT = 25.5Ω, unless otherwise noted (See Figure 2). VS is defi(V+OUT + V–OUT)/2. VICM is defi ned as (V+IN + V–IN)/2. VOUTDIFF is defi ned as (V+OUT – V–OUT). VINDIFF is defi ned as (VINP – VINM).MINTYP–7248203010.88.944.2MAXUNITSdBcdBmnsnsdBdBMHzf3dBFILTERDifferential Filter 3dB BandwidthNote 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: The inputs +IN, –IN are protected by a pair of back-to-back diodes. If the differential input voltage exceeds 1.4V, the input current should be limited to less than 10mA. Input pins (+IN, –IN, VOCM, and SHDN) are also protected by steering diodes to either supply. If the inputs should exceed either supply voltage, the input current should be limited to less than 10mA.Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefi nitely. Long term application of output currents in excess of the absolute maximum ratings may impair the life of the device.Note 4: The LTC6403-1 is guaranteed functional over the operating temperature range –40°C to 85°C.Note 5: The LTC6403C-1 is guaranteed to meet specifi ed performance from 0°C to 70°C. The LTC6403C-1 is designed, characterized, and expected to meet specifi ed performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. The LTC6403I-1 is guaranteed to meet specifi ed performance from –40°C to 85°C.Note 6: Input bias current is defi ned as the average of the input currents fl owing into Pin 6 and Pin 15 (–IN, and +IN). Input offset current is defi ned as the difference of the input currents fl owing into Pin 15 and Pin 6 (IOS = +–IB – IB)Note 7: Input common mode range is tested using the test circuit of Figure 1 by measuring the differential gain with a ±1V differential output with VICM = mid-supply, and also with VICM at the input common mode range limits listed in the Electrical Characteristics table, verifying that the differential gain has not deviated from the mid supply common mode input case by more than 1%, and the common mode offset (VOSCM) has not deviated from the mid-supply case by more than ±10mV.The voltage range for the output common mode range is tested using the test circuit of Figure 1 by applying a voltage on the VOCM pin and testing at both mid supply and at the Electrical Characteristics table limits to verify that the differential gain has not deviated from the mid supply VOCM case by more than 1%, and the common mode offset (VOSCM) has not deviated by more than ±10mV from the mid supply case.Note 8: Input CMRR is defi ned as the ratio of the change in the input common mode voltage at the pins +IN or –IN to the change in differential input referred voltage offset. Output CMRR is defi ned as the ratio of the change in the voltage at the VOCM pin to the change in differential input referred voltage offset. These specifi cations are strongly dependent on feedback ratio matching between the two outputs and their respective inputs, and it is diffi cult to measure actual amplifi er performance. (See “The Effects of Resistor Pair Mismatch” in the General Applications Section of this datasheet.) For a better indicator of actual amplifi er performance independent of feedback component matching, refer to the PSRR specifi cation.Note 9: Differential power supply rejection (PSRR) is defi ned as the ratio of the change in supply voltage to the change in differential input referred voltage offset. Common mode power supply rejection (PSRRCM) is defi ned as the ratio of the change in supply voltage to the change in the common mode offset, VOUTCM – VOCM.Note 10: Output swings are measured as differences between the output and the respective power supply rail.Note 11: Extended operation with the output shorted may cause junction temperatures to exceed the 150°C limit and is not recommended. See Note 3 for more details.Note 12: A resistive load is not required when driving an AD converter with the LTC6403-1. Therefore, typical output power is very small. In order to compare the LTC6403-1 with amplifi ers that require 50Ω output load, the LTC6403-1 output voltage swing driving a given RL is converted to OIP3 as if it were driving a 50Ω load. Using this modifi ed convention, 2VP-P is by defi nition equal to 10dBm, regardless of actual RL.64031f5
元器件交易网www.cecb2b.com
LTC6403-1TYPICAL PERFORMANCE CHARACTERISTICS
Differential Offset Voltagevs Temperature0.80.60.40.20–0.2–0.4–0.6
VS = 3VVOCM = 1.5VVICM = 1.5VRI = RF = 402ΩFIVE TYPICAL UNITS80
100
COMMON MODE OFFSET VOLTAGE (mV)DIFFERENTIAL OFFSET VOLTAGE (mV)8
Common Mode Offset Voltagevs TemperatureVS = 3VVOCM = 1.5V6
VICM = 1.5VFIVE TYPICAL UNITS420–2–4–6
–8
204060–60–40–200
TEMPERATURE (°C)
80
100
12TOTAL SUPPLY CURRENT (mA)1086420
Supply Current vs Supply VoltageVSHDN = OPEN–0.8
204060–60–40–200
TEMPERATURE (°C)
TA = –40°CTA = 25°CTA = 85°C0
1
234SUPPLY VOLTAGE (V)
5
64031 G03
64031 G0164031 G02
Supply Current vs SHDN Voltage12TOTAL SUPPLY CURRENT (mA)1086420
VS = 3V0
0.5
1.01.52.0SHDN VOLTAGE (V)
2.5
3.0
SHUTDOWN SUPPLY CURRENT (μA)TA = –40°CTA = 25°CTA = 85°C350300250200150100500
Shutdown Supply Currentvs Supply VoltageVSHDN = V–50–5–10GAIN (dB)–15–20–25
TA = –40°CTA = 25°CTA = 85°C0
1
2
3
4
5
64031 G05
Frequency Responsevs Load CapacitanceCL = 0pFCL = 3.9pFCL = 10pF–30–35–40
1
VS = 3VVOCM = VICM = 1.5VRLOAD = 800ΩRI = RF = 402ΩCAPACITOR VALUES ARE FROMEACH OUTPUT TO GROUND.NO SERIES RESISTORS ARE USED.10100FREQUENCY (MHz)
1000
64031 G06
SUPPLY VOLTAGE (V)
64031 G04
Frequency Response vs Gain50403020GAIN (dB)100–10–20–30–40
VS = 3VVOCM = VICM = 1.5VRLOAD = 800Ω1
10100
FREQUENCY (MHz)
1000
64031 G08
AV = 100AV = 20AV = 10AV = 5AV = 2AV (V/V)12510AV = 1RI(Ω)402402402402402402RF(Ω)4028062k4.02k8.06k40.2k20100–500.1
64031f6
元器件交易网www.cecb2b.com
LTC6403-1TYPICAL PERFORMANCE CHARACTERISTICS
Harmonic Distortion vs Frequency–40
DIFFERENTIAL INPUTSVS = 3V–50
VOCM = VICM = 1.5VRF = RI = 402Ω–60
RLOAD = 800ΩVOUTDIFF = 2VP-P–70–80–90
HD2HD3–60
Harmonic Distortionvs Output AmplitudeDIFFERENTIAL INPUTSVS = 3VV–70OCM = VICM = 1.5VRF = RI = 402ΩRLOAD = 800Ω–80fIN = 3MHz–90–100
SECOND–110–120
–30
Harmonic Distortion vs FrequencySINGLE-ENDED INPUT–40VS = 3VVOCM = VICM = 1.5V–50RF = RI = 402ΩRLOAD = 800Ω–60VOUTDIFF = 2VP-P–70–80–90
THIRDSECONDDISTORTION (dBc)DISTORTION (dBc)THIRD–100–110–120
1
10
FREQUENCY (MHz)
100
64031 G09
123VOUTDIFF (VP-P)
45
64031 G11
DISTORTION (dBc)–100–110–120
1
10
FREQUENCY (MHz)
100
64031 G12
Harmonic Distortionvs Output AmplitudeINPUT VOLTAGE NOISE DENSITY (nV/√Hz)SINGLE-ENDED INPUT–40VS = 3VVOCM = VICM = 1.5V–50RF = RI = 402ΩRLOAD = 800Ω–60fIN = 10MHz–70–80–90–30
100
Input Noise Density vs FrequencyVS = 3VVICM = 1.5V100
INPUT CURRENT NOISE DENSITY (pA/√Hz)1000
Differential Output Impedancevs FrequencyVS = 3VRI = RF = 402Ω100OUTPUT IMPEDANCE (Ω)THIRDDISTORTION (dBc)SECONDin10
en10
10
1
–100–110–120
0
1
23VOUTDIFF (VP-P)
4
5
64031 G14
0.1
1100
1k
10k100kFREQUENCY (Hz)
1M
110M
64031 G17
0.01
0.1
1
10100
FREQUENCY (MHz)
1000
64031 G18
CMRR vs Frequency70
220
Differential Slew Ratevs TemperatureSmall Signal Step Response+OUT60
SLEW RATE (V/μs)210
VS = 5V20mV/DIVVS = 3VCMRR (dB)50
200
40
30VS = 3VVOCM = 1.5VRI = RF = 402Ω0.05% FEEDBACK NETWORK RESISTORS20
10.1101001000FREQUENCY (MHz)
64031 G19
190
VS = 3VVOCM = VICM= 1.5VRLOAD = 800ΩRI = RF = 402ΩCL = 0pFVIN = 180mVP-P,DIFFERENTIAL–OUT180
170
20–60–40–2004060
TEMPERATURE (°C)
80100
5ns/DIV
64031 G21
64031 G22
64031f7
元器件交易网www.cecb2b.com
LTC6403-1TYPICAL PERFORMANCE CHARACTERISTICS
Large Signal Step ResponseVS = 3V, RLOAD = 800ΩVIN = 2VP-P DIFFERENTIAL–OUTVOLTAGE (V)2.01.51.00.5
+OUT0
20ns/DIV
64031 G23
Overdrive Transient Response3.0
–OUT2.5
0.2V/DIVVS = 3VVOCM = 1.5V+OUT50ns/DIV
64031 G24
PIN FUNCTIONS
HDN (Pin 1): When SHDN is flS oating or directly tied to V+, the LTC6403-1 is in the normal (active) operating mode. When Pin 1 is pulled a minimum of 2.1V below V+, the LTC6403-1 enters into a low power shutdown state. See Applications Information for more details.V+, V– (Pins 2, 10, 11 and Pins 3, 9, 12): Power Supply Pins. Three pairs of power supply pins are provided to keep the power supply inductance as low as possible to prevent any degradation of amplifi er 2nd harmonic performance. It is critical that close attention be paid to supply bypassing. For single supply applications (Pins 3, 9 and 12 grounded) it is recommended that high quality 0.1μF surface mount ceramic bypass capacitors be placed between Pins 2 and 3, between Pins 11 and 12, and between Pins 10 and 9 with direct short connections. Pins 3, 9 and 10 should be tied directly to a low impedance ground plane with minimal routing. For dual (split) power supplies, it is recommended that at least two additional high quality, 0.1μF ceramic capacitors are used to bypass pin V+ to ground and V– to ground, again with minimal routing. For driving large loads (<200Ω), additional bypass capacitance may be needed for optimal performance. Keep in mind that small geometry (e.g. 0603) surface mount ceramic capacitors have a much higher self resonant frequency than do leaded capacitors, and perform best in high speed applications.64031f8
元器件交易网www.cecb2b.com
LTC6403-1PIN FUNCTIONS
VOCM (Pin 4): Output Common Mode Reference Voltage. The voltage on VOCM sets the output common mode voltage level (which is defi ned as the average of the voltages on the +OUT and –OUT pins). The VOCM pin is the midpoint of an internal resistive voltage divider between V+ and V– that develops a (default) mid-supply voltage potential to maximize output signal swing. The VOCM pin can be overdriven by an external voltage reference capable of driving the input impedance presented by the VOCM pin. On the LTC6403-1, the VOCM pin has an input resistance of approximately 23k to a mid-supply potential. The VOCM pin should be bypassed with a high quality ceramic bypass capacitor of at least 0.01μF, (unless you are using split supplies, then connect directly to a low impedance, low noise ground plane) to minimize common mode noise from being converted to differential noise by impedance mismatches both external and internal to the IC.NC (Pins 5, 16): No Connection. These pins are not con-nected internally.+OUT, –OUT (Pins 7, 14): Unfi ltered Output Pins. Each amplifi er output is designed to drive a load capacitance of 10pF. This means the amplifi er can drive 10pF from each output to ground or 5pF differentially. Larger capacitive loads should be decoupled with at least 25Ω resistors from each output.+OUTF, –OUTF (Pins 8, 13): Filtered Output Pins. These pins have a series 100Ω resistor connected between the fi ltered and unfi ltered outputs and three 12pF capacitors. Both +OUTF, and –OUTF have 12pF to V–, plus an ad-ditional 12pF differentially between +OUTF and –OUTF. This fi lter creates a differential low pass pole with a –3dB bandwidth of 44.2MHz.+IN, –IN (Pins 15, 6): Non-Inverting and Inverting Input pins of the amplifi er, respectively. For best performance, it is highly recommended that stray capacitance be kept to an absolute minimum by keeping printed circuit con-nections as short as possible and stripping back nearby surrounding ground plane away from these pins.Exposed Pad (Pin 17): Tie the pad to V– (Pins 3, 9, and 12). If split supplies are used, do not tie the pad to ground.BLOCK DIAGRAM
16V+V–V+SHDN1V2V3–+NC15+IN14V+–OUT13–OUTFV–V+V+V–66kV+12pF100ΩV–12V–V+11V+V–V+46k+12pFVOCMV+100Ω12pFV–VOCM46kV––V+10V–V–94V–NCV–V–56–INV+V–V+7+OUT8+OUTFV+64031 BD64031f9
元器件交易网www.cecb2b.com
LTC6403-1APPLICATIONS INFORMATION
RIV+INRFV–OUTV–OUTF16NC15+IN14–OUT13–OUTFLTC6403-1V–12V–V+11V+V+10V–V–95RINC6–INRF7+OUT8+OUTF64031 F01IL+VINP–SHDNSHDNVSHDNV+VCM
0.1μFV–31V+2V–V–VOCMVOCM40.01μFV+RBALV–0.1μF0.1μFVOUTCM+VOCMV+0.1μF0.1μFV–0.1μF–RBAL–VINM+V–INV+OUTV+OUTFILFigure 1. DC Test CircuitAPPLICATIONS INFORMATION
0.1μFVINPRT16NC15+IN14–OUTRIV+INRFV–OUTV–OUTF13–OUTFLTC6403-1V–12340Ω0.1μF140ΩSHDNSHDN50ΩVSHDNV+0.1μFV–31V+2V–V–VOCMVOCM0.01μF50.1μFVINMRIRT4NC6–INRF7+OUT8+OUTFV+V–0.1μF0.1μFMINI-CIRCUITSTCM4-19••••+VIN
M/A-COMETC1-1-13+VOCMV+V–V+11V+10V–V–950ΩV+0.1μF0.1μFV–0.1μF––64031 F02V–INV+OUTV+OUTF340Ω0.1μF140ΩFigure 2. AC Test Circuit (–3dB BW testing)64031f10
元器件交易网www.cecb2b.com
LTC6403-1APPLICATIONS INFORMATION
Functional DescriptionThe LTC6403-1 is a small outline, wide band, low noise, and low distortion fully-differential amplifi er with accurate output phase balancing. The LTC6403-1 is optimized to drive low voltage, single-supply, differential input analog-to-digital converters (ADCs). The LTC6403-1’s output is capable of swinging rail-to-rail on supplies as low as 2.7V, which makes the amplifi er ideal for converting ground referenced, single-ended signals into VOCM referenced differential signals in preparation for driving low voltage, single-supply, differential input ADCs. Unlike traditional op amps which have a single output, the LTC6403-1 has two outputs to process signals differentially. This allows for two times the signal swing in low voltage systems when compared to single-ended output amplifi ers. The balanced differential nature of the amplifi er also provides even-order harmonic distortion cancellation, and less susceptibility to common mode noise (like power supply noise). The LTC6403-1 can be used as a single ended input to differential output amplifi er, or as a differential input to differential output amplifi er.The LTC6403-1’s output common mode voltage, defi ned as the average of the two output voltages, is independent of the input common mode voltage, and is adjusted by applying a voltage on the VOCM pin. If the pin is left open, an internal resistive voltage divider develops a potential halfway between the V+ and V– pin voltages. Whenever VOCM is not hard tied to a low impedance ground plane, it is recommended that a high quality ceramic capacitor is used to bypass the VOCM pin to a low impedance ground plane (See Layout Considerations in this document). The LTC6403-1’s internal common mode feedback path forces accurate output phase balancing to reduce even order harmonics, and centers each individual output about the potential set by the VOCM pin. VOUTCM=VOCM=
V+OUT+V–OUT
2
Additional outputs (+OUTF and –OUTF) are available that provide fi ltered versions of the +OUT and –OUT outputs. An on-chip single pole RC passive fi lter bandlimits the fi ltered outputs to a –3dB frequency of 44.2MHz. The user has a choice of using the unfi ltered outputs, the fi ltered outputs, or modifying the fi ltered outputs to adjust the frequency response by adding additional components (see Output Filter Considerations and Use section).In applications where the full bandwidth of the LTC6403-1 is desired, the unfi ltered outputs (+OUT and –OUT) should be used. The unfi ltered outputs +OUT and –OUT are designed to drive 10pF to ground (or 5pF differentially). Capacitances greater than 10pF will produce excess peaking, which can be mitigated by placing at least 25Ω in series with the output.Input Pin ProtectionThe LTC6403-1’s input stage is protected against differen-tial input voltages that exceed 1.4V by two pairs of back to back diodes connected in anti-parallel series between +IN and –IN (Pins 6 and 15). In addition, the input pins have steering diodes to either power supply. If the input pair is over-driven, the current should be limited to under 10mA to prevent damage to the IC. The LTC6403-1 also has steering diodes to either power supply on the VOCM, and SHDN pins (Pins 4 and 1), and if exposed to voltages which exceed either supply, they too, should be current limited to under 10mA.SHDN PinIf the SHDN pin (Pin 1), is pulled 2.1V below the positive supply, the LTC6403-1 will power down. The pin has the Thevenin equivalent impedance of approximately 66k to V+. If the pin is left unconnected, an internal pull-up resistor of 150k will keep the part in normal active operation. Care should be taken to control leakage currents at this pin to under 1μA to prevent inadvertently putting the LTC6403-1 into shutdown. In shutdown, all biasing current sources are shut off, and the output pins, +OUT and –OUT, will each appear as an open collector with a non-linear capacitor in parallel and steering diodes to either supply. Because of The outputs (+OUT and –OUT) of the LTC6403-1 are capable of swinging rail-to-rail. They can source or sink up to approximately 60mA of current.64031f11
元器件交易网www.cecb2b.com
LTC6403-1APPLICATIONS INFORMATION
the non-linear capacitance, the outputs still have the ability to sink and source small amounts of transient current if exposed to signifi cant voltage transients. The inputs (+IN and –IN) appear as anti-parallel diodes which can conduct if voltage transients at the input exceed 1.4V. The inputs also have steering diodes to either supply. The turn-on time between the shutdown and active states is typically 4μs, and turn-off time is typically 350ns.General Amplifi er ApplicationsAs levels of integration have increased and correspond-ingly, system supply voltages decreased, there has been a need for ADCs to process signals differentially in order to maintain good signal to noise ratios. These ADCs are typically operated from a single supply voltage which can be as low as 3V (2.7V min), and will have an optimal com-mon mode input range near mid-supply. The LTC6403-1 makes interfacing to these ADCs trivial, by providing both single ended to differential conversion as well as common mode level shifting. The front page of this datasheet shows a typical application. Referring to Figure 1, the gain to VOUTDIFF from VINM and VINP is: VOUTDIFF=V+OUT–V–OUT≈
RF
•(VINP–VINM)RI
VOUTDIFF=V+OUT–V–OUT≈ΔβΔβ
•VINCM–•VβAVGβAVGOCM
RF•V+RIINDIFF
where:RF is the average of RF1, and RF2, and RI is the average of RI1, and RI2. ned as the average feedback factor (or gain) βAVG is defifrom the outputs to their respective inputs:RI2⎞1⎛RI1βAVG=•⎜+
2⎝RI1+RF1RI2+RF2⎟⎠
Δβ is defi ned as the difference in feedback factors:Δβ= RI2RI1–
RI2+RF2RI1+RF1
VINCM is defi ned as the average of the two input voltages VINP, and VINM (also called the source-referred input com-mon mode voltage):1
VINCM=•(VINP+VINM)2 and VINDIFF is defi ned as the difference of the input voltages: VINDIFF = VINP – VINMRI2V+INRF2V–OUTF16NC15+IN14–OUT13–OUTFLTC6403-1V–12V–V+11V+V+10V–V–95RI1NC6–INRF17+OUT8+OUTF64031 F03Note from the above equation, the differential output voltage (V+OUT – V–OUT) is completely independent of input and output common mode voltages. This makes the LTC6403-1 ideally suited for pre-amplifi cation, level shifting and conversion of single-ended input signals to differential output signals in preparation for driving dif-ferential input ADCs.Effects of Resistor Pair MismatchFigure 3 shows a circuit diagram with takes into consid-eration that real world resistors will not perfectly match. Assuming infi nite open loop gain, the differential output relationship is given by the equation:+VINPV–OUT–SHDNSHDNVSHDNV+0.1μFV–31V+2V–V–VOCMVVOCM4V+V–
0.1μF0.1μF
V+0.1μF
0.1μFV–0.1μF
+VOCM––VINM0.01μF+V–INV+OUTFV+OUTFigure 3. Real-World Application with Feedback Resistor Pair Mismatch64031f12
元器件交易网www.cecb2b.com
LTC6403-1APPLICATIONS INFORMATION
When the feedback ratios mismatch (Δβ), common mode to differential conversion occurs.Setting the differential input to zero (VINDIFF = 0), the de-gree of common mode to differential conversion is given by the equation:VOUTDIFF=V+OUT–V–OUT≈(VINCM–VOCM)•
ΔββAVG
Input Impedance and Loading EffectsThe input impedance looking into the VINP or VINM input of Figure 1 depends on whether the sources VINP and VINM are fully differential. For balanced input sources (VINP = –VINM), the input impedance seen at either input is simply: RINP = RINM = RIFor single ended inputs, because of the signal imbalance at the input, the input impedance increases over the bal-anced differential case. The input impedance looking into either input is:RINP=RINM= RI
⎛1⎛RF⎞⎞⎜1–2•⎜R+R⎟⎟
⎝IF⎠⎠⎝
In general, the degree of feedback pair mismatch is a source of common mode to differential conversion of both signals and noise. Using 1% resistors or better will mitigate most problems, and will provide about 34dB worst case of common mode rejection. Using 0.1% resistors will provide about 54dB of common mode rejection. A low impedance ground plane should be used as a refer-ence for both the input signal source and the VOCM pin. Directly shorting VOCM to this ground or bypassing the VOCM with a high quality 0.1μF ceramic capacitor to this ground plane will further mitigate against common mode signals being converted to differential.There may be concern on how feedback ratio mismatch affects distortion. Distortion caused by feedback ratio mis-match using 1% resistors or better is negligible. However, in single supply level shifting applications where there is a voltage difference between the input common mode voltage and the output common mode voltage, resistor mismatch can make the apparent voltage offset of the amplifi er appear worse than specifi ed.The apparent input referred offset induced by feedback ratio mismatch is derived from the above equation: VOSDIFF(APPARENT) ≈ (VINCM – VOCM) • ΔβUsing the LTC6403-1 in a single supply application on a single 5V supply with 1% resistors, and the input common mode grounded, with the VOCM pin biased at mid-supply, the worst case mismatch can induce 25mV of apparent offset voltage. With 0.1% resistors, the worst case appar-ent offset reduces to 2.5mV.Input signal sources with non-zero output impedances can also cause feedback imbalance between the pair of feedback networks. For the best performance, it is recommended that the source’s output impedance be compensated. If input impedance matching is required by the source, R1 should be chosen (see Figure 4):R1=
RINM•RSRINM–RS
According to Figure 4, the input impedance looking into ects the single ended source the differential amp (RINM) reflcase, thus:RINM= RI⎛1⎛RF⎞⎞⎜1–2•⎜R+R⎟⎟
⎝IF⎠⎠⎝
R2 is chosen to balance R1 || RS:R2=
RI•RS
RI+RS
64031f13
元器件交易网www.cecb2b.com
LTC6403-1APPLICATIONS INFORMATION
RINMRSVSR1RIRFVINP (setting VINM to zero), the input common voltage is approximately:+––VOCMR1 CHOSEN SO THAT R1 || RINM = RSR2 CHOSEN TO BALANCE RS || R1RIR2 = RS || R1+RF⎛RI⎞V+IN+V–INVICM=≈VVOCM•⎜+
2⎝RI+RF⎟⎠
64031 F04⎛RF⎞VINPVCM•⎜+⎟R+R2⎝FI⎠ ⎛RF⎞
•⎜
⎝RF+RI⎟⎠
Figure 4. Optimal Compensation for Signal Source ImpedanceOutput Common Mode Voltage RangeThe output common mode voltage is defi ned as the aver-age of the two outputs:VOUTCM=VVOCM=
V+OUT+V–OUT2
Input Common Mode Voltage RangeThe LTC6403-1’s input common mode voltage (VICM) is defi ned as the average of the two input voltages, V+IN, and V–IN. It extends from V– to 1.4V below V+.For fully differential input applications, where VINP = –VINM, the input common mode voltage is approximately (Refer to Figure 5):⎛RI⎞V+IN+V–INVICM=≈VVOCM•⎜+
2⎝RI+RF⎟⎠⎛RF⎞
VCM•⎜
RF+RI⎟⎝⎠ With singled ended inputs, there is an input signal com-ponent to the input common mode voltage. Applying only RIV+INRFV–OUTF16NC15+IN14–OUT13–OUTFLTC6403-1V–12V–V+11V+V+10V–V–95RINC6–INRF7+OUT8+OUTF64031 F05 The VOCM pin sets this average by an internal common mode feedback loop. The output common mode range extends from 1.1V above V– to 1V below V+. The VOCM pin sits in the middle of an internal voltage divider which sets the default mid-supply open circuit potential.In single supply applications, where the LTC6403-1 is used to interface to an ADC, the optimal common mode input range to the ADC is often determined by the ADC’s reference. If the ADC makes a reference available for set-ting the input common mode voltage, it can be directly tied to the VOCM pin, but must be capable of driving the input impedance presented by the VOCM as listed in the Electrical Characteristics Table. This impedance can be assumed to be connected to a mid-supply potential. If an external reference drives the VOCM pin, it should still be bypassed with a high quality 0.01μF or higher capacitor to a low impedance ground plane to fi lter any thermal noise and to prevent common mode signals on this pin from being inadvertently converted to differential signals.Output Filter Considerations and UseFiltering at the output of the LTC6403-1 is often desired to provide either anti-aliasing or improved signal to noise ratio. To simplify this fi ltering, the LTC6403-1 includes an additional pair of differential outputs (+OUTF and –OUTF) which incorporate an internal lowpass fi lter network with a –3dB bandwidth of 44.2MHz (Figure 6).64031f+VINPV–OUT–SHDNSHDNVSHDNV+0.1μFV–31V+VCM2V–V–VOCMVVOCM4V+V–
0.1μF0.1μF
V+0.1μF
0.1μFV–0.1μF
+VOCM––VINM0.01μF+V–INV+OUTFV+OUTFigure 5. Circuit for Common Mode Range14
元器件交易网www.cecb2b.com
LTC6403-1APPLICATIONS INFORMATION
These pins each have an output impedance of 100Ω. In- ltered output, ternal capacitances are 12pF to V– on each fiplus an additional 12pF capacitor connected differentially between the two fi ltered outputs. This resistor/capacitor combination creates fi ltered outputs that look like a se-ries 100Ω resistor with a 36pF capacitor shunting each fi ltered output to AC ground, providing a –3dB bandwidth of 44.2MHz, and a noise bandwidth of 69.4MHz. The fi lter cutoff frequency is easily modifi ed with just a few external components. To increase the cutoff frequency, simply add 2 equal value resistors, one between +OUT and +OUTF and the other between –OUT and –OUTF (Figure 7). These resistors, in parallel with the internal 100Ω resistors, lower the overall resistance and therefore increase fi lter bandwidth. For example, to double the fi lter bandwidth, add two external 100Ω resistors to lower the series fi lter resistance to 50Ω. The 36pF of capacitance remains unchanged, so fi lter bandwidth doubles. Keep in mind, the series resistance also serves to decouple the outputs from load capacitance. The unfi ltered outputs of the LTC6403-1 are designed to drive 10pF to ground or 5pF differentially, so care should be taken to not lower the effective impedance between +OUT and +OUTF or –OUT and –OUTF below 25Ω.To decrease fi lter bandwidth, add two external capacitors, one from +OUTF to ground, and the other from –OUTF to ground. A single differential capacitor connected between +OUTF and –OUTF can also be used, and since it is being driven differentially it will appear at each fi ltered output as a single-ended capacitance of twice the value. To halve the fi lter bandwidth, for example, two 36pF capacitors could be added (one from each fi ltered output to ground). Alternatively, one 18pF capacitor could be added between the fi ltered outputs, again halving the fi lter bandwidth. Combinations of capacitors could be used as well; a three capacitor solution of 12pF from each fi ltered output to ground plus a 12pF capacitor between the fi ltered outputs would also halve the fi lter bandwidth (Figure 8).100Ω–OUT–OUTFLTC6403-112pFV–12V–FILTERED OUTPUT(88.4MHz)1413100Ω+–12pF100Ω–12pFVV–97+OUT100Ω8+OUTF64031 F07Figure 7. LTC6403-1 Filter Topology Modifi ed for 2x Filter Bandwidth (2 External Resistors)–OUT–OUTFLTC6403-112pFV–12V–12pFFILTERED OUTPUT(22.1MHz)12pF14–OUT13–OUTFLTC6403-112pFV–12V–FILTERED OUTPUT(44.2MHz)1413100Ω100Ω+–+–12pF100Ω–12pFVV–12pF100Ω–12pFVV–12pF997+OUT8+OUTF64031 F067+OUT8+OUTF64031 F08Figure 6. LTC6403-1 Internal Filter TopologyFigure 8. LTC6403-1 Filter Topology Modifi ed for 1/2x Filter Bandwidth (3 External Capacitors)64031f15
元器件交易网www.cecb2b.com
LTC6403-1APPLICATIONS INFORMATION
Noise ConsiderationsThe LTC6403-1’s input referred voltage noise is on the order of 2.8nV/√Hz. Its input referred current noise is on the order of 1.8pA/√Hz. In addition to the noise generated by the amplifi er, the surrounding feedback resistors also contribute noise. A noise model is shown in Figure 9. The output noise generated by both the amplifi er and the feedback components is governed by the equation:⎛⎛RF⎞⎞2e++IR•12••()nF+⎜ni⎜R⎟⎟⎝⎝I⎠⎠⎛⎛R⎞⎞2•⎜enRI•⎜F⎟⎟+2•enRF2⎝RI⎠⎠⎝22The LTC6403-1’s input referred voltage noise contributes the equivalent noise of a 480Ω resistor. When the feedback network is comprised of resistors whose values are less than this, the LTC6403-1’s output noise is voltage noise dominant (See Figure 10.):⎛R⎞
eno≈eni•⎜1+F⎟
⎝RI⎠
eno= Feedback networks consisting of resistors with values greater than about 1k will result in output noise which is resistor noise and amplifi er current noise dominant.eno≈2• RF⎞2⎛I•R+1+•4•k•T•RF(nF)⎜⎟⎝RI⎠A plot of this equation, and a plot of the noise generated by the feedback components for the LTC6403-1 is shown in Figure 10.enRI22
RI2in+2RF2enRF22
Lower resistor values (<400Ω) always result in lower noise at the penalty of increased distortion due to increased loading of the feedback network on the output. Higher 16NC15+IN14–OUT13–OUTFLTC6403-1V–12V–V+11V+V+10V–V–9V–V+enof2eno2SHDNSHDN1V+V+2V–V–encm245NCin–26–IN7+OUT8+OUTF3V–VOCMV+V–+VOCM–64031 F09eni2enRI12RI1RF1enRF12Figure 9. Noise Model of the LTC6403-164031f16
元器件交易网www.cecb2b.com
LTC6403-1APPLICATIONS INFORMATION
100
TOTAL (AMPLIFIER AND FEEDBACK NETWORK)OUTPUT NOISEnV/√Hz10
FEEDBACK RESISTOR NETWORK NOISE ALONEsupplies, it is recommended that at least two additional high quality, 0.1μF ceramic capacitors are used to bypass pin V+ to ground and V– to ground, again with minimal routing. For driving large loads (<200Ω), additional bypass capacitance may be needed for optimal performance. Keep in mind that small geometry (e.g. 0603) surface mount ceramic capacitors have a much higher self resonant frequency than do leaded capacitors, and perform best in high speed applications.10k
1100
1kRF = RI (Ω)
64031 F10
Figure 10. LTC6403-1 Output Spot Noise vs Spot Noise Contributed by Feedback Network Aloneresistor values (but still less than 2k) will result in higher output noise, but improved distortion due to less loading on the output. The optimal feedback resistance for the LTC6403-1 runs between 400Ω to 2k.The differential fi ltered outputs +OUTF and –OUTF will have a little higher spot noise than the unfi ltered outputs (due to the two 100Ω resistors which contribute 1.3nV/√Hz each), but actually will provide superior signal-to-noise ratios in noise bandwidths exceeding 69.4Mhz due to the noise-fi ltering function the fi lter provides.Layout ConsiderationsBecause the LTC6403-1 is a very high speed amplifi er, it is sensitive to both stray capacitance and stray inductance. Three pairs of power supply pins are provided to keep the power supply inductance as low as possible to prevent any degradation of amplifi er 2nd Harmonic distortion performance. It is critical that close attention be paid to supply bypassing. For single supply applications (Pins 3, 9 and 12 grounded) it is recommended that 3 high quality 0.1μF surface mount ceramic bypass capacitor be placed between pins 2 and 3, between pins 11and 12, and between pins10 and 9 with direct short connections. Pins 3, 9 and 10 should be tied directly to a low impedance ground plane with minimal routing. For dual (split) power Any stray parasitic capacitances to ground at the sum-ming junctions +IN, and –IN should be kept to an absolute minimum even if it means stripping back the ground plane away from any trace attached to this node. This becomes especially true when the feedback resistor network uses resistor values >2k in circuits with RF = RI. Excessive peaking in the frequency response can be mitigated by adding small amounts of feedback capacitance around RF. Always keep in mind the differential nature of theLTC6403-1, and that it is critical that the load impedances seen by both outputs (stray or intended) should be as bal-anced and symmetric as possible. This will help preserve the natural balance of the LTC6403-1, which minimizes the generation of even order harmonics, and preserves the rejection of common mode signals and noise.It is highly recommended that the VOCM pin be either hard tied to a low impedance ground plane (in split supply applications), or bypassed to ground with a high quality ceramic capacitor whose value exceeds 0.01μF. This will help stabilize the common mode feedback loop as well as prevent thermal noise from the internal voltage divider and other external sources of noise from being converted to differential noise due to divider mismatches in the feed-back networks. It is also recommended that the resistive feedback networks comprise 1% resistors (or better) to enhance the output common mode rejection. This will also prevent the VOCM-referred common mode noise of the common mode amplifi er path (which cannot be fi ltered) from being converted to differential noise, degrading the differential noise performance.64031f17
元器件交易网www.cecb2b.com
LTC6403-1APPLICATIONS INFORMATION
Interfacing the LTC6403-1 to A/D ConvertersThe LTC6403-1’s rail-to-rail output and fast settling time make the LTC6403-1 ideal for interfacing to low voltage, single supply, differential input ADCs. The sampling process of ADCs creates a sampling glitch caused by switching in the sampling capacitor on the ADC front end which momentarily “shorts” the output of the amplifi er as charge is transferred between the amplifi er and the sampling capacitor. The amplifi er must recover and settle from this load transient before this acquisition period ends for a valid representation of the input signal. In general, theLTC6403-1 will settle much more quickly from these pe-riodic load impulses than from a 2V input step, but it is a good idea to either use the fi ltered outputs to drive the ADC (Figure 11 shows an example of this), or to place a discrete R-C fi lter network between the differential unfi l-tered outputs of the LTC6403-1 and the input of the ADC 402Ω
402Ω
to help absorb the charge injection that comes out of the ADC from the sampling process. The capacitance of the fi lter network serves as a charge reservoir to provide high frequency charging during the sampling process, while the two resistors of the fi lter network are used to dampen and attenuate any charge kickback from the ADC. The selection of the R-C time constant is trial and error for a given ADC, but the following guidelines are recommended: Choosing too large of a resistor in the decoupling network will create a voltage divider between the dynamic input impedance of the ADC and the decoupling resistors leaving insuffi cient settling time. Choosing too small of a resistor will possibly prevent the resistor from properly dampening the load transient caused by the sampling process, prolonging the time required for settling. 16-bit applications require a minimum of 11 R-C time constants to settle. It is rec-ommended that the capacitor chosen have a high quality dielectric (for example, C0G multilayer ceramic).16NC15+IN14–OUT13–OUTFLTC6403-1V–12V–V+11V+10V–V–90.1μF3.3V0.1μFAIN–VCM2.2μFAIN+LTC2207GNDVDD1μFD15••D03.3V
CONTROLSHDNSHDN1V+3.3V0.1μF32V–V++VOCMV+V–VOCM–40.1μF5VIN, 2VP-PNC402Ω6–IN402Ω7+OUT8+OUTF64031 F11Figure 11. Interfacing the LTC6403-1 to ADC (Shared 3.3V Supply Voltage)64031f18
元器件交易网www.cecb2b.com
LTC6403-1PACKAGE DESCRIPTION
UD Package16-Lead Plastic QFN (3mm × 3mm)(Reference LTC DWG # 05-08-1691)0.70 ±0.053.50 ± 0.051.45 ± 0.052.10 ± 0.05(4 SIDES)PACKAGE OUTLINE0.25 ±0.050.50 BSCRECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.75 ± 0.05BOTTOM VIEW—EXPOSED PADR = 0.115TYP15160.40 ± 0.1011.45 ± 0.10(4-SIDES)2PIN 1 NOTCH R = 0.20 TYPOR 0.25 × 45° CHAMFER
3.00 ± 0.10(4 SIDES)PIN 1TOP MARK(NOTE 6)(UD16) QFN 09040.200 REF0.00 – 0.05NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.25 ± 0.050.50 BSC64031fInformation furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.19
元器件交易网www.cecb2b.com
LTC6403-1RELATED PARTS
PART NUMBERLT1994LT5514LT5524LTC6401-20LTC6401-26LT6402-6LT6402-12LT6402-20LTC6404-1LTC6404-2LTC6404-4LTC6406LT6411DESCRIPTIONLow Noise, Low Distortion Differential Op AmpUltralow Distortion IF Amplifi er/ADC Driver with Digitally Controlled GainLow Distortion IF Amplifi er/ADC Driver with Digitally Controlled Gain1.3GHz Low Noise Low Distortion Differential ADC Driver1.6GHz Low Noise Low Distortion Differential ADC Driver300MHz Differential Amplifi er/ADC Driver300MHz Differential Amplifi er/ADC Driver300MHz Differential Amplifi er/ADC Driver600MHz Rail-to-Rail Output Differential Op Amp900MHz Rail-to-Rail Output Differential Op Amp1800MHz Rail-to-Rail Output Differential Op Amp3GHz Rail-to-Rail Input Differential Op AmpLow Power Differential ADC Driver/Dual Selectable Gain Amplifi erHigh Slew Rate Low Cost Single/Dual/Quad Op AmpsVery High Slew Rate Low Cost Single/Dual/Quad Op AmpsUltra High Slew Rate Low Cost Single/Dual Op AmpsCOMMENTS16-Bit Performance at 1MHz, Rail-to-Rail OutputsOIP3 = 47dBm at 100MHz, Gain Control Range 10.5dB to 33dBOIP3 = 40dBm at 100MHz, Gain Control Range 4.5dB to 37dBAV = 20dB, 50mA Supply Current, IMD = –74dBc at 140MHzAV = 26dB, 45mA Supply Current, IMD = –72dBc at 140MHzAV = 6dB, Distortion <–80dBc at 25MHzAV = 12dB, Distortion <–80dBc at 25MHzAV = 20dB, Distortion <–80dBc at 25MHzAV = 1 Stable, 1.6nV/√Hz, –90dBc Distortion at 10MHzAV = 2 Stable, 1.6nV/√Hz, –95dBc Distortion at 10MHzAV = 4 Stable, 1.6nV/√Hz, –98dBc Distortion at 10MHz1.6nV/√Hz Noise, –72dBc Distortion at 50MHz, 18mA16mA Supply Current, IMD3 = –83dBc at 70MHz, AV = 1, –1 or 2High-Speed Differential Amplifi ers/Differential Op AmpsHigh-Speed Single-Ended Output Op AmpsLT1812/LT1813/LT1814LT1815/LT1816/LT1817LT1818/LT1819LT6200/LT6201LT6204/LT6203/LT6204LT6230/LT6231/LT6232LT6233/LT6234/LT6235Integrated FiltersLTC1562-2LT1568LTC1569-7LT6600-2.5LT6600-5LT6600-10LT6600-15LT6600-20Very Low Noise, 8th Order Filter Building BlockVery Low Noise, 4th Order Filter Building BlockLinear Phase, Tunable 10th Order Lowpass FilterVery Low Noise Differential 2.5MHz FilterVery Low Noise Differential 5MHz FilterVery Low Noise Differential 10MHz FilterVery Low Noise Differential 15MHz FilterVery Low Noise Differential 20MHz FilterLowpass and Bandpass Filters Up to 300kHzLowpass and Bandpass Filters Up to 10MHzSingle-Resistor Programmable Cut-Off to 300kHzSNR = 86dB at 3V Supply, 4th Order FilterSNR = 82dB at 3V Supply, 4th Order FilterSNR = 82dB at 3V Supply, 4th Order FilterSNR = 76dB at 3V Supply, 4th Order FilterSNR = 76dB at 3V Supply, 4th Order Filter750V/μsec, 3mA Supply Current, 8nV/√Hz Noise1500V/μsec, 6.5mA Supply Current, 6nV/√Hz Noise2500V/μsec, 9mA Supply Current, 6nV/√Hz NoiseRail-to-Rail Input and Output Low Noise Single/Dual Op Amps0.95nV/√Hz Noise, 165MHz GBW, Distortion = –80dBc at 1MHzRail-to-Rail Input and Output Low Noise Single/Dual/Quad Op 1.9nV/√Hz Noise, 3mA Supply Current, 100MHz GBWAmpsRail-to-Rail Output Low Noise Single/Dual/Quad Op Amps1.1nV/√Hz Noise, 3.5mA Supply Current, 215MHz GBWRail-to-Rail Output Low Noise Single/Dual/Quad Op Amps1.9nV/√Hz Noise, 1.2mA Supply Current, 60MHz GBW64031f20
Linear Technology CorporationLT 0108 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com© LINEAR TECHNOLOGY CORPORATION 2008
因篇幅问题不能全部显示，请点此查看更多更全内容