High density gate array cell architecture with met

专利名称：High density gate array cell architecture

with metallization routing tracks having avariable pitch

发明人：Jonathan C. Park申请号：US08/580908申请日：19951229公开号：US05990502A公开日：19991123

摘要：A gate array cell architecture is provided with routing tracks at variable trackpitches, thereby increasing the density of the architecture. Orientation of the devices inthe gate cells perpendicularly to the routing tracks in the second metallization layerprovides an increased porosity in this layer. The orientation allows an N channel device tobe made smaller than a P channel device within a gate cell, to provide balanced devices.The perpendicular orientation also provides more contact points for source or drain.When the mulitple contacts are used to connect the device to a power source, themultiple contacts reduce the effective resistance and increase the reliability of thedevices.

申请人：LSI LOGIC CORPORATION

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