FPGA可编程逻辑器件芯片XC3S200A-4FG320I中文规格书

Table 5-1:

User I/O Ports (Cont’d)Name

pm_tick

Size

1

I/O

I

Description

PM tick input for AXI4-Lite read operations.Note:This input is available when Include AXI4-Lite

Control and Statistics Interface is selected in the General Tab.

simplex_mode_rx_aligned1I

This signal is used to indicate to the generator module that the simplex RX module is aligned and the generator can now start the packet generation.Note:This input is available only for simplex TX.

This signal is used for streaming continuous packets. 1'b1: Streams continuous packets from the generator.

send_continuous_pkts1I

1'b0: Fixed number of packets to be transmitted.(For runtime switchable configurations: if this input is 1'b1 at the beginning, you must deassert this signal before switching the mode.)

This signal is used to initiate the GT DRP write operation to switch the operation mode of CMAC.

switch_caui_mode1I

After the GT DRP operation, a normal data sanity check will be performed for the switched mode.

Note:This input is available only for the mode Runtime

Switchable. This input should be a single pulse. Do not apply another pulse before RX is aligned.

lbus_tx_rx_restart_in1I

This signal is used to restart the packet generation and reception for the data sanity test, when the packet generator and the packet monitor are in idle state, that is, when tx_busy_led = 0 and rx_busy_led = 0.Indicates that the GT has been locked.

Note:This input is available only for simplex TX mode.Indicates that the packet generator has sent all the packets.

Indicates the CMAC operation mode (CAUI-10/CAUI-4).

tx_gt_locked_ledtx_done_led

11

OO

caui_mode_led1O

1’b0: CAUI-101’b1: CAUI-4

Note:This output is available only for the mode Runtime

Switchable.

tx_busy_ledrx_gt_locked_ledrx_aligned_ledrx_done_ledrx_data_fail_led

11111

OOOOO

Indicates that the generator is busy and is not able to respond to the lbus_tx_rx_restart_in command.Indicates that the GT has been locked. Indicates that RX alignment has been achieved.Indicates that the monitor has received all packets.Indicates the data comparison failed in the packet monitor.

Integrated 100G Ethernet Subsystem v2.6PG165 February 4, 2021

Chapter 5:Example Design

Table 5-2:

CORE XCI Top-Level Port List (Cont’d)Name

Size

I/O

Description

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt_rxcdrhold

10/4

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Port width: 10-bit for CAUI-10 or Runtime Switchable case, and 4-bit width for CAUI-4 mode.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt_rxpolarity

10/4

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Port width: 10-bit for CAUI-10 or Runtime Switchable case, and 4-bit width for CAUI-4 mode.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt_rxrate

30/12

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Port width: 30-bit for CAUI-10 or Runtime Switchable case, and 12-bit width for CAUI-4 mode.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt_txdiffctrl

50/20

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Port width: 50-bit for CAUI-10 or Runtime Switchable case, and 20-bit width for CAUI-4 mode.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt_txpolarity

10/4

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Port width: 10-bit for CAUI-10 or Runtime Switchable case, and 4-bit width for CAUI-4 mode.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt_txinhibit

10/4

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Port width: 10-bit for CAUI-10 or Runtime Switchable case, and 4-bit width for CAUI-4 mode.

Integrated 100G Ethernet Subsystem v2.6PG165 February 4, 2021

Chapter 5:Example Design

Table 5-2:

CORE XCI Top-Level Port List (Cont’d)Name

Size

I/O

Description

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt0_drpwe

1

I

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Note:This port is available when Enable Additional GT

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt0_drpaddr

10

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt0_drpdi

16

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Refer to the applicable GT user guide for the port description.

gt0_drpdo

16

O

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt0_drprdy

1

O

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt1_drpen

1

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt1_drpwe

1

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt1_drpaddr

10

I

Note:This port is available when Enable Additional GT

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Refer to the applicable GT user guide for the port description.[Ref11][Ref12]

gt1_drpdi

16

I

Control/Status and DRP Ports is selected from the CMAC / GT Selection and Configuration tab.

Note:This port is available when Enable Additional GT

Integrated 100G Ethernet Subsystem v2.6PG165 February 4, 2021