TECHNICAL DATA
KK74HC04A
Hex Inverter
High-Performance Silicon-Gate CMOS
The KK74HC04A is identical in pinout to the LS/ALS04. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
• Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION KK74HC04AN Plastic KK74HC04AD SOIC TA = -55° to 125° C for all packages LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Inputs Output A Y L H
PIN 14 =VCC PIN 7 = GND
H L
1
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KK74HC04A
MAXIMUM RATINGS*
Symbol Parameter VCCVINVOUTIINIOUTICCPDTstg TL
*
Value Unit -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5
±20 ±25 ±50 750 500 -65 to +150
260
V V V mA mA mA mW °C °C
DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin
DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
VCCVIN, VOUT
TAtr, tf
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 1)
VCC =2.0 V VCC =4.5 V VCC =6.0 V
2.0 0 -55 0 0 0
6.0 VCC+125 1000 500 400
V V °C ns
Symbol Parameter Min Max Unit
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
2
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KK74HC04A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
VCC
Guaranteed Limit
≤85 °C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 ±1.0
≤125 °C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 ±1.0
Unit
Symbol Parameter Test Conditions V 25 °C
to -55°C
2.04.56.02.04.56.02.04.56.0 4.56.02.04.56.0 4.56.06.06.0
1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.98 5.48 0.1 0.1 0.1 0.26 0.26 ±0.1
VIH
Minimum High-VOUT=0.1 V
Level Input Voltage ⎢IOUT⎢≤ 20 µA Maximum Low -VOUT= VCC-0.1 V
Level Input Voltage ⎢IOUT⎢ ≤ 20 µA Minimum High-Level Output Voltage
VIN=VIL
⎢IOUT⎢ ≤ 20 µA VIN=VIL ⎢IOUT⎢ ≤ 4.0 mA ⎢IOUT⎢ ≤ 5.2 mA VIN=VIH
⎢IOUT⎢ ≤ 20 µA VIN=VIH ⎢IOUT⎢ ≤ 4.0 mA ⎢IOUT⎢ ≤ 5.2 mA VIN=VCC or GND VIN=VCC or GND IOUT=0µA
V
VILV
VOHV
VOL
Maximum Low-Level Output Voltage
V
IINICC
Maximum Input Leakage Current Maximum
Quiescent Supply Current
(per Package)
µA
1.0 10 40 µA
3
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KK74HC04A
AC ELECTRICAL CHARACTERISTICS (CL=50pF,Input tr=tf=6.0 ns)
VCC
Guaranteed Limit
Unit
Symbol Parameter V 25 °C ≤85°C ≤125°C
to -55°CtPLH, tPHL
Maximum Propagation Delay, Input A to Output Y (Figures 1 and 2)
Maximum Output Transition Time, Any Output (Figures 1 and 2)
Maximum Input Capacitance
Power Dissipation Capacitance (Per Inverter) Used to determine the no-load dynamic power consumption:
PD=CPDVCC2f+ICCVCC
2.04.56.02.04.56.0-
75 15 13 75 15 13 10
95 19 16 95 19 16 10
110 22 19 110 22 19 10
ns
tTLH, tTHLns
CINCPD
pF pF
TA=25˚С, VCC=5.0 V
20
Figure 1 Switching Waveforms. Figure 2. Test Circuit
EXPANDED LOGIC DIAGRAM
(1/6 of the Device)
4
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KK74HC04A
N SUFFIX PLASTIC DIP(MS - 001AA)A148B17Dimension, mmSymbolABCMIN18.676.1MAX19.697.115.330.361.142.547.620°2.927.620.20.3810°3.818.260.360.561.78FLDFC-T-SEATINGNGD0.25 (0.010) M TKPLANEGHHJMJKLMNNOTES:1. Dimensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side.D SUFFIX SOIC(MS - 012AB)Dimension, mm8A14SymbolAMIN8.553.81.350.330.41.275.270°0.10.195.80.25MAX8.7541.750.511.27HBPBC1G7CR x 45DFG-T-D0.25 (0.010) M TCMKSEATINGPLANEHJFMJKMPR8°0.250.256.20.5NOTES:1. Dimensions A and B do not include mold flash or protrusion.2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side.
5
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