TECHNICAL DATA
KK74HCT244A
Octal 3-State Noninverting
Buffer/Line Driver/Line Receiver
High-Performance Silicon-Gate CMOS
The KK74HCT244A is identical in pinout to the LS/ALS244. The device may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs.
The KK74HCT244A is an octal noninverting buffer/line driver/line receiver designed to be used with 3-state memory address drivers, clock drivers, and other bus-oriented systems. The device has non-inverted outputs and two active-low output enables.
ORDERING INFORMATION • TTL/NMOS-Compatible Input Levels
KK74HCT244AN Plastic • Outputs Directly Interface to CMOS, NMOS, and TTL KK74HCT244ADW SOIC • Operating Voltage Range: 4.5 to 5.5 V TA = -55° to 125° C for all packages • Low Input Current: 1.0 µA
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs Outputs Enable A, Enable B
PIN 20=VCC PIN 10 = GND
A,B YA,YB L L L L H H H X Z X=don’t care;Z = high impedance
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KK74HCT244A
MAXIMUM RATINGS*
Symbol Parameter VCCVINVOUTIINIOUTICCPDTstg TL
*
Value Unit -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5
±20 ±35 ±75 750 500 -65 to +150
260
V V V mA mA mA mW °C °C
DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin
DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP** SOIC Package**Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. **
Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit VCCVIN, VOUT
TAtr, tf
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 1)
4.5 0 -55 0
5.5 VCC+125 500
V V °C ns
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KK74HCT244A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol Parameter Test Conditions VCC
V
Guaranteed Limit 25 °C
to -55°C2.0 2.0 0.8 0.8 4.4 5.4 3.98 0.1 0.1 0.26
≤85 °C 2.0 2.0 0.8 0.8 4.4 5.4 3.84 0.1 0.1 0.33
≤125 °C 2.0 2.0 0.8 0.8 4.4 5.4 3.7 0.1 0.1 0.4
Unit
VIHVILVOH VOL IIH
Minimum High-Level Input Voltage Maximum Low -Level Input Voltage
VOUT= VCC-0.1 V ⎢IOUT⎢≤ 20 µA VOUT=0.1 V ⎢IOUT⎢ ≤ 20 µA =
4.5
5.54.55.54.55.5 4.54.55.5 4.55.5
V V V V
Minimum High-VIN=VIH
Level Output Voltage ⎢IOUT⎢ ≤ 20 µA
VIN=VIH
⎢IOUT⎢ ≤ 6.0 mA
Maximum Low-VIN= VIL
Level Output Voltage ⎢IOUT⎢ ≤ 20 µA
Minimum High-Level Input Leakage Current
Maximum Low-Level Input Leakage Current
Minimum High-Level Three-State Leakage Current
VIN= VIL
⎢IOUT⎢ ≤6.0 mA VIN=VCC
0.1 1.0 1.0 µA
IILVINGND 5.5-0.1 -1.0 -1.0 µA
IOZH
VIN(01) =VIH
VIN(19) =VIH
VIN =VСС (on other outputs) VOUT=VCC
VIN(01) =VIH VIN(19) =VIH
VIN =VСС (on other outputs)
VOUT=GND VIL=GND VIN=VCC IOUT=0 µA
VIN=2.4 V, Any One InputVIN=VCC or GND, Other Inputs IOUT=0µA
5.50.5 5.0 10.0 µA
IOZL
Maximum Low-Level Three-State
Leakage Current
5.5-0.5 -5.0 -10.0 µA
ICC
Maximum Quiescent
Supply Current per Package) Additional Quiescent Supply Current
5.54.0 40 160 µA
∆ICC
≥-55°C 25°C to 125°C mA
5.52.9 2.4 NOTE: Total Supply Current = ICC + Σ∆ICC.
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KK74HCT244A
AC ELECTRICAL CHARACTERISTICS (VCC =5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)
Symbol Parameter Test Conditions VCC
В
Guaranteed Limit 25 °C
to -55°C
≤85°C ≤125°
C
Unit
tPLH, tPHL
Maximum Propagation Delay, A to YA or B to YB (Figures 1 and 2)
VCC=5 V±10% VIL=0 V VIH=3 V tLH=tHL=6 ns =
CL=50 pF VCC=5 V±10% VIL=0 V VIH=3 V tLH=tHL=6 ns CL=50 pF VCC=5 V±10% VIL=0 V VIH=3 V tLH=tHL=6 ns CL=50 pF
5.0 20 25 30 ns tPLZ, tPHZ
Maximum Propagation
Delay , Output Enable to YA or YB (Figures 1 and 2)
5.0 26 33 39 ns tPZL, tPZH
Maximum Propagation
Delay , Output Enable to YA or YB (Figures 1 and 2)
5.0 22 28 33 ns tTLH, tTHL
Maximum Output Transition VCC=5 V±10%
Time, Any Output (Figures VIL=0 V
VIH=3 V 1 and 2)
tLH=tHL=6 ns CL=50 pF Maximum Input Capacitance VCC=5 V±10% Maximum Three-State
Output Capacitance (Output in High-Impedance State)
V±10% VCC5
5.0 12 15 18 ns CINCOUT
5.0 10 10 10 pF
5.0 15 15 15 pF
CPD
Power Dissipation Capacitance (Per Enabled Output) Used to determine the no-load dynamic power
consumption:
PD=CPDVCC2f+ICCVCC
Typical @25°C,VCC=5.0 V
55 pF
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
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KK74HCT244A
Figure 3. Test Circuit
Figure 4. Test Circuit
EXPANDED LOGIC DIAGRAM
(1/8 of the Device)
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KK74HCT244A
N SUFFIX PLASTIC DIP(MS - 001AD)ADimension, mm2011B110SymbolABCMIN24.896.1MAX26.927.115.33FLDF0.361.142.547.620°2.927.620.20.380.561.78C-T-SEATINGNGD0.25 (0.010) M TKPLANEGHHJMJKLMN10°3.818.260.36NOTES:1. Dimensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side.D SUFFIX SOIC(MS - 013AC)A2011Dimension, mmSymbolMIN12.67.42.350.330.41.279.530°0.10.23100.258°0.30.3210.650.75MAX137.62.650.511.27HBPAB1G10CR x 45CDF-T-D0.25 (0.010) M TCMKSEATINGPLANEJFMGHJKMPRNOTES:1. Dimensions A and B do not include mold flash or protrusion.2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side.
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