专利名称：Configuration bus
reconfigurable/reprogrammable interfacefor expanded direct memory accessprocessor
发明人：Fuoco, Charles,Agarwala, Sanjive,Comisky,
David A.
申请号：EP00307803.7申请日：20000908公开号：EP1083487A2公开日：20010314
专利附图：
摘要：The configuration bus (330, 332, 336, 337) interconnection protocol provides theconfiguration interfaces to the memory-mapped registers (322, 372) throughout thedigital signal processor chip. The configuration bus is a parallel set of communicationsprotocols, but for control of peripherals rather than for data transfer. While the
expanded direct memory access processor (350) is heavily optimized for maximizing datatransfers, the configuration bus protocol is made to be as simple as possible for ease ofimplementation and portability.
申请人：Texas Instruments Incorporated
地址：7839 Churchill Way, Mail Station 3999 Dallas, Texas 75251 US
国籍：US
代理机构：Legg, Cyrus James Grahame
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